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SUMMIT
MICROELECTRONICS, Inc. Distributed Power Hot-Swap Controller
SMH4811A
Preliminary
FEATURES
l Supply Range 20VDC to >500VDC l Versatile Card Insertion Detection Supports: w Multi-length Pin Systems w Card Injector Switch Sensing w Programmable Debounce Periods l Control Powering-on of DC/DC Converters l Highly Programmable Host Voltage Monitoring w Programmable Under- and Over-voltage Detection w Programmable UV Filter l Programmable Power Good Delay for enabling the DC/DC Converter l Programmable Circuit Breaker Function w Programmable Over-Current Filter w Programmable Quick-TripTM Circuit Breaker Values l 2.5V and 5.0V reference outputs w Easy Expansion of External Monitor Functions
DESCRIPTION
The SMH4811A is designed to control hot swapping of plug-in cards operating from a single supply ranging from 20V to 500V. It provides under-voltage and over-voltage monitoring of the host power supply, drives an external power MOSFET switch that connects the supply to the load, and also protects against over-current conditions that might disrupt the host supply. When the input and output voltages to its controls are within specification, it provides a Power Good logic output that may be used to turn loads on (e.g., an isolated-output DC-DC converter, or drive a LED status light). Additional features of the SMH4811A include: temperature sense or master enable input, 2.5V and 5V reference outputs for expanding monitor functions, two Pin-Detect enable inputs for fault protection, and duty-cycle over-current protection.
SIMPLIFIED APPLICATION DRAWING
0V
Disable/Enable
VDD Pin Detect PD1#
ENPG
FAULT# UV
SMH4811A
OV
PG#
DC/DC
Pin Detect
PD2# VSS CBSENSE VGATE 2.5VREF 5.0VREF
-48V
Characteristics subject to change without notice
2044 SAD 5.1
(c)SUMMIT MICROELECTRONICS, Inc., 2000 * 300 Orchard City Dr., Suite 131 * Campbell, CA 95008 * Phone 408-378-6461 * FAX 408-378-6586 * www.summitmicro.com 2044 6.1 2/8/01
1
SMH4811A
Preliminary
PIN CONFIGURATION
16-Pin SOIC
RECOMMENDED OPERATING CONDITIONS Temperature -40C to 85C.
DRAIN SENSE VGATE EN/TS PD1# PD2# FAULT# CBSENSE VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD PG# ENPG NC 2.5VREF 5VREF OV UV
2044 PCon 5.0
FUNCTIONAL BLOCK DIAGRAM
ENPG
14
VDD 16
12VREF
12 2.5VREF
+
DRAIN 1 SENSE
50k 200k 50k
-
11 5.0VREF
EN/TS 3 PD1# 4 PD2# 5
+ -
PROGRAMMABLE DELAY
15 PG#
UV 9
+ - FILTER +
OV 10
5V
12V
2.5V
2 VGATE
VSS 8
PROGRAMMABLE DELAY 50mV
CBSENSE 7
Programmable Quick Response Ref. Voltage
2
- 50k VGATE SENSE + - + -
6 FAULT#
DUTY CYCLE TIMER
2044 BD 5.2
2044 6.1 2/8/01
SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
PIN DESCRIPTIONS
DRAIN SENSE (1) The DRAIN SENSE input monitors the voltage at the drain of the external power MOSFET switch with respect to VSS. An internal 10A source pulls the DRAIN SENSE signal towards the 5V reference level. DRAIN SENSE must be held below 2.5V to enable the PG outputs. VGATE (2) The VGATE output activates an external power MOSFET switch. This signal supplies a constant current output (100A typical), which allows easy adjustment of the MOSFET turn on slew rate. EN/TS (3) The Enable/Temperature Sense input is the master enable input. If EN/TS is less than 2.5V, VGATE will be disabled. This pin has an internal 200k pull-up to 5V. PD1# and PD2# (4 & 5) These are logic level active low inputs that can optionally be employed to enable VGATE and the PG outputs when they are at VSS. These pins each have an internal 50k pull-up to 5V. FAULT# (6) This is an open-drain, active-low output that indicates the fault status of the device. CBSENSE (7) The circuit breaker sense input is used to detect overcurrent conditions across an external, low value sense resistor (RS) tied in series with the Power MOSFET. A voltage drop of greater than 50mV across the resistor for longer than tCBD will trip the circuit breaker. A programmable Quick-TripTM sense point is also available. UV (9) The UV pin is used as an under-voltage supply monitor, typically in conjunction with an external resistor ladder. VGATE will be disabled if UV is less than 2.5V. Programmable internal hysteresis is available on the UV input, adjustable in increments of 62.5mV. Also available is a filter delay on the UV input. OV (10) The OV pin is used as an over-voltage supply monitor, typically in conjunction with an external resistor ladder. VGATE will be disabled if OV is greater than 2.5V. A filter delay is available on the OV input. 5.0VREF & 2.5VREF (11 & 12) These are precision 5V and 2.5V output reference voltages that may be use to expand the logic input functions on the SMH4803A. The reference outputs are with respect to VSS. ENPG (14) This is an active high input that controls the PG# output. When ENPG is pulled low the PG# output is immediately placed in a high impedance state. This pin has an internal 50k pull-up to 5V. PG# (15) The PG# pin is an open-drain, active-low output with no internal pull-up resistor. It can be used to switch a load or enable a DC/DC converter. PG# is enabled immediately after VGATE reaches VDD - VGT and the DRAIN SENSE voltage is less than 2.5V. Voltage on these pins cannot exceed 12V, as referenced to VSS. VDD (16) VDD is the positive supply connection. An internal shunt regulator limits the voltage on this pin to approximately 12V with respect to VSS. A resistor must be placed in series with the VDD pin to limit the regulator current (RD in the application illustrations). VSS (8) VSS is connected to the negative side of the supply.
SUMMIT MICROELECTRONICS, Inc.
2044 6.1 2/8/01
3
SMH4811A
Preliminary
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ...................... -55C to 125C Storage Temperature ........................... -65C to 150C Lead Solder Temperature (10 secs) ................... 300 C Terminal Voltage with Respect to VSS: VDD ................................. -0.5V to VDD OV, UV, DRAIN SENSE, CBSENSE ........... -0.5V to VDD+0.5V PD1#, PD2#, ENPG, EN/TS ......... 10V FAULT#, PG# ........ -0.5V to VDD+0.5V VGATE ................................ VDD+0.5V *COMMENT
Stresses listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
AC OPERATING CHARACTERISTICS
Symbol Description Min. Typ. 400 tCBD 50mV Circuit Breaker Delay (filter) 150 50 * 5 50 250 500 tPGD Programmable Power Good Delay 1.5 5* 20 80 160 tFSTSHTDN tCYC Fast Shut Down delay from fault to VGATE off Circuit breaker cycle mode time 200 2.5 * Off * tPUVF Programmable Under-Voltage filter 5 80 160 0.5 tPDD Programmable Pin Detect Delay 5 80 * 160
Note: * Indicates default value
Max.
Units s s s s s s s ms ms ms ms ms ns s -- ms ms ms ms ms ms ms
2044 Prog Table
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SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
DC OPERATING CHARACTERISTICS
(Over Recommended Operating Conditions; Voltages are relative to VSS)
Symbol VDD 5.0VREF ILOAD5 2.5VREF ILOAD2.5 IDD VUV VUVHYST VOV VOVHYST VVGATE IVGATE VSENSE ISENSE VCB Parameter Supply voltage 5V reference output 5V reference output current 2.5V reference output 2.5V reference output current Power supply current Under-Voltage threshold Under-Voltage hysteresis Over-Voltage threshold Over-Voltage hysteresis VGATE output voltage VGATE current output DRAIN SENSE threshold DRAIN SENSE current output Circuit breaker threshold Programmable Quick Trip circuit breaker threshold Off VENTS VENTSHYST VIH VIL VOL VGT EN/TS threshold EN/TS hysteresis Input high voltage: ENPG Input low voltage: ENPG Output low voltage: FAULT# Output low voltage: PG# Gate threshold IOL = 2mA ISINK = 2mA IDD = 3mA (1) IDD = 3mA IDD = 3mA 2 -0.1 0 0 0.7 1.8 2.475 2.425 2.500 2.500 10 5.0VREF 0.8 0.4 0.4 3.0 2.525 2.575 IDD = 3mA (1) IDD = 3mA VSENSE = VSS (1) IDD = 3mA 2.475 2.425 9 40 100 2.500 2.500 10 50 200 VQCB 100 60 2.525 2.575 11 60 Conditions IDD = 3mA IDD = 3mA IDD = 3mA IDD = 3mA (1) IDD = 3mA IDD = 3mA Output enabled IDD = 3mA (1) IDD = 3mA IDD = 3mA IDD = 3mA (1) IDD = 3mA IDD = 3mA 2.475 2.425 Min. 11 4.75 -1 2.475 2.425 -0.2 2 2.475 2.425 2.500 2.500 10 2.500 2.500 10 VDD 2.525 2.575 2.500 2.500 Typ. 12 5.00 Max. 13 5.25 1 2.525 2.575 1 10 2.525 2.575 Units V V mA V V mA mA V V mV V V mV V A V V A mV mV mV mV -- V V mV V V V V V
2044 Elect Table
Note: (1) TA = 25C.
SUMMIT MICROELECTRONICS, Inc.
2044 6.1 2/8/01
5
SMH4811A
Preliminary
FUNCTIONAL DESCRIPTION
GENERAL OPERATION The SMH4811A is an integrated power controller for hot swappable add-in cards. The device operates from a wide supply range and generates the signals necessary to drive an isolated output DC/DC converter. As a typical add-in board is inserted into the powered backplane physical connections must first be made with the chassis to discharge any electrostatic voltage potentials. The board then contacts the long pins on the backplane that provide power and ground. As soon as power is applied the device starts up, but does not immediately apply power to the output load. Under-voltage and over-voltage circuits inside the controller check to see that the input voltage is within a user-specified range, and pin detection signals determine whether the card is seated properly. These requirements must be met for a Pin Detect Delay period of tPDD, after which time the hot-swap controller enables VGATE to turn on the external power MOSFET switch. The VGATE output is current limited to IVGATE, allowing the slew rate to be easily modified using external passive components. During the controlled turn-on period the VDS of the MOSFET is monitored by the DRAIN SENSE input. When the drain sense drops below 2.5V, and VGATE gets above VDD - VGT, the power good output can turn on the DC/DC controller. A Power Good Enable input may be used to activate or deactivate an output load. Steady state operation is maintained as long as all conditions are normal. Any of the following events may cause the device to disable the DC/DC controller by shutting down the power MOSFET: an under-voltage or overvoltage condition on the host power supply; an overcurrent event detected on the CBSENSE input; a failure of the power MOSFET sensed via the DRAIN SENSE pin; the pin detect signals becoming invalid; or the master enable (EN/TS) falling below 2.5V. The SMH4811A may be configured so that after any of these events occur the VGATE output shuts off and either latches into an off state or recycles power after a cooling down period, tCYC. Powering VDD The SMH4811A contains a shunt regulator on the VDD pin that prevents the voltage from exceeding 12V. It is necessary to use a dropper resistor (RD) between the host power supply and the VDD pin in order to limit current into the device and prevent possible damage. The dropper resistor allows the device to operate across a wide range of system supply voltages, and also helps protect the device against common-mode power surges. Refer to the Applications Section for help on calculating the RD resistance value.
6
System Enables There are several enabling inputs, which allow a host system to control the SMH4811A. The Pin Detect pins (PD1# & PD2#) are two active low enables that are generally used to indicate that the add-in circuit card is properly seated. This is typically done by clamping the inputs to VSS through the implementation of an injector switch, or alternatively through the use of a staggered pins at the card-cage interface. Two shorter pins arrayed at opposite ends of the connector force the card to be fully seated (not canted) before both pin detects are enabled. Care must be taken not to exceed the maximum voltage rating of these pins during the insertion process. Refer to details in the Applications Section for proper circuit implementation. The EN/TS input provides an active high comparator input that may be used as a master enable or temperature sense input. These inputs must be held low for a period of tPDD before a power-up sequence may be initiated. Under-/Over-Voltage Sensing The Under-Voltage (UV) and Over-Voltage (OV) inputs provide a set of comparators that act in conjunction with an external resistive divider ladder to sense when the host supply voltage exceeds the user defined limits. If the input to the UV pin rises above 2.5V, or the input to the OV pin falls below 2.5V for a period of tPDD, the power-up sequence may be initiated. The tPDD filter helps prevent spurious start-up sequences while the card is being inserted. If UV falls below 2.5V or OV rises above 2.5V, the PG and VGATE outputs will be shut down immediately.
2.5V OV / UV
tUOFLTR
FAULT#
2044 Fig01 5.0
Figure 1. Under-/Over-Voltage Filter Timing
2044 6.1 2/8/01 SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
Under-/Over-Voltage Filtering The SMH4811A may also be configured so that an out of tolerance condition on UV/OV will not shut off the output immediately. Instead, a filter delay may be inserted so that only sustained under-voltage or over-voltage conditions will shut off the output. When the UV/OV filter option is enabled an out of tolerance condition on UV or OV for longer than the filter delay time, tUOFLTR, activates the FAULT# output, and the VGATE and PG outputs will be latched in the off state. To initiate another power-up sequence the FAULT# output must first be reset. Refer to the appropriate section on resetting the FAULT# output. The Under-/Over-Voltage Filtering feature is disabled in the default configuration of the device.
Under-Voltage Hysteresis The Under-Voltage comparator input may be configured with a programmable level of hysteresis. The compare level may be set in steps (up to 15) of 62.5mV below 2.5V. The default under-voltage hysteresis level is set to 62.5mV. Soft Start Slew Rate Control Once all of the preconditions for powering up the DC/DC controller have been met, the SMH4811A provides a means to soft start the external power FET. It is important to limit in-rush current to prevent damage to the add-in card or disruptions to the host power supply. For example,
VDD
11 VDD 13 UV 2.5VREF OV
PD1# + PD2#
tPDD
VDD - VGT VGATE VDD
5V DRAIN SENSE
2.5VREF
50mVREF CBSENSE PG#
ENPG
2044 Fig02 5.0
Figure 2. Complete Power On Timing Sequence
SUMMIT MICROELECTRONICS, Inc. 2044 6.1 2/8/01
7
SMH4811A
Preliminary
charging the filter capacitance (normally required at the input of the DC/DC controller) too quickly may generate very high current. The VGATE output of the SMH4811A is current limited to IVGATE, allowing the slew rate to be easily modified using external passive components. The slew rate may be found by dividing IVGATE by the gate-todrain capacitance placed on the external FET. A complete design example is given in the Applications Section. Load Control -- Sequencing the Secondary Supplies Once power has been ramped to the DC/DC controllers, two conditions must be met before the PG# output can be enabled: the Drain Sense voltage must be below 2.5V, and the VGATE voltage must be greater than VDD -VGT. The Drain Sense input helps ensure that the power MOSFET is not absorbing too much steady state power from operating at a high VDS. This sensor remains active at all times (except during the current regulation period). The VGATE sensor makes sure that the power MOSFET is operating well into its saturation region before allowing the load to be switched on. Once VGATE reaches VDD -VGT this sensor is latched. Once the external MOSFET is properly switched on the PG# output may be enabled (if ENPG is high). The PG# output has a 12V withstand capability, so high voltages must not be connected to this pin. A bipolar transistor or opto-isolator can be used to boost the withstand voltage to that of the host supply. Circuit Breaker Operation The SMH4811A provides a number of circuit breaker functions to protect against over current conditions. A sustained over-current event could damage the host supply and/or the load circuitry. The board's load current passes through a series resistor (RS) connected between the MOSFET source (which is tied to CBSENSE) and VSS. The breaker trips whenever the voltage drop across RS is greater than 50mV for more than tCBD (a factory programmable filter delay ranging from 10s to 500s). Quick-TripTM Circuit Breaker Additionally, the SMH4811A provides a Quick-Trip feature that will cause the circuit breaker to trip immediately if the voltage drop across RS exceeds VQCB. The Quick-Trip level may be factory set to 60mV, 100mV (default), 200mV, or the feature may be disabled.
Current Regulation The current regulation mode is an optional feature that provides a means to regulate current through the MOSFET for a programmable period of time. If enabled the device will start the internal timer when the voltage at CBSENSE exceeds 50mV. Also, it attempts to limit the voltage at CBSENSE to 60mV by regulating the VGATE output. The circuit breaker will trip if the over-current condition remains after the time-out. However, if CBSENSE drops below 50mV before the timer ends, the timer is reset and VGATE resumes normal operation. If the Quick-Trip level is exceeded then the device will bypass the current regulation timer and shut down immediately. The Current Regulation feature is disabled in the default configuration. Non-Volatile Fault Latch The SMH4811A also provides an optional nonvolatile fault latch (NVFL) circuit breaker feature. The nonvolatile fault latch essentially provides a programmable fuse on the circuit breaker. When enabled the nonvolatile fault latch will be set whenever the circuit breaker trips. Once set, it cannot be reset by cycling power.
NOTE: THE
DEVICE REMAINS PERMANENTLY DISABLED
UNTIL IT IS REPROGRAMMED AT THE FACTORY.
As long as the NVFL is set the FAULT# output will be driven active. The Non-Volatile Fault Latch feature is disabled in the default configuration. Resetting FAULT# When the circuit breaker trips the VGATE output is turned off and FAULT# is driven low. In the default condition the breaker resets automatically after a time of tCYC. In the latched condition cycling power to the board or toggling the EN/TS input will also reset the circuit breaker. If the over current condition still exists after the MOSFET switches back on, the circuit breaker will re-trip.
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2044 6.1 2/8/01
SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
PROGRAMMABLE FEATURES
CBSENSE
TFSTSHTDN VGATE
2044 Fig03 5.0
The SMH4811A has programmable time and voltage functions that can be fine-tuned for a wide variety of applications. Because of this a manufacturer can use a common part type across a wide range of boards that are used on a common host but have different electrical loads, power-on timing requirements, host voltage monitoring needs, etc. This ability shifts the focus of design away from designing a new power interface for each board to concentrating on the value added back-end logic. Because the programming is done at final test all combinations (all 128 possibilities) are readily available as off the shelf stock items. Also see the AC Operating Characteristics Table. Pin Detect The Pin Detect function can be enabled or disabled.
Figure 3. Circuit Breaker Timing -- Quick Trip
13
12
Circuit Breaker Delay The circuit breaker delay defines the period of time the voltage drop across RS is greater than 50mV but less than VQCB before the VGATE output will be shut down. This is effectively a filter to prevent spurious shutdowns of VGATE.
Temp, C -40 0 25 85 125
VDD (V)
11
Power Good Delay The PG delay timer that controls the delay to PG# being asserted. Quick-Trip Circuit Breaker Threshold This is the threshold voltage drop across RS that is placed between VSS and CBSENSE.
10
9
0
2
4
6 IDD (mA)
8
10
12
2044 Fig04
Figure 4. Effect of Temperature on Current Consumption Over Voltage Range
SUMMIT MICROELECTRONICS, Inc.
2044 6.1 2/8/01
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SMH4811A
Preliminary
APPLICATIONS
Operating at High Voltages The breakdown voltage of the external active and passive components limits the maximum operating voltage of the SMH4811A hot-swap controller. Components that must be able to withstand the full supply voltage are: the input and output decoupling capacitors, the protection diode in series with the DRAIN SENSE pin, the power MOSFET switch and the capacitor connected between its drain and gate, the high-voltage transistors connected to the power good output, and the dropper resistor connected to the controller's VDD pin. Over-Voltage and Under-Voltage Resistors In the following examples the three resistors, R1, R2, and R3, connected to the OV and UV inputs must be capable of withstanding the maximum supply voltage of several hundred volts. The trip voltage of the UV and OV inputs is 2.5V relative to VSS. As the input impedance of UV and OV is very high, large value resistors can be used in the resistive divider. The divider resistors should be high stability, 1% metal-film resistors to keep the under-voltage and over-voltage trip points accurate. Telecom Design Example A hot-swap telecom application may use a 48V power supply with a -25% to +50% tolerance (i.e., the 48V supply can vary from 36V to 72V). The formulae for calculating R1, R2, and R3 follow. First a peak current, IDMAX, must be specified for the resistive network. The value of the current is arbitrary, but it can't be too high (self-heating in R3 will become a problem), or too low (the value of R3 becomes very large, and leakage currents can reduce the accuracy of the OV and UV trip points). The value of IDMAX should be 200A for the best accuracy at the OV and UV trip points. A value of 250A for IDMAX will be used to illustrate the following calculations. With VOV (2.5V) being the over-voltage trip point, R1 is calculated by the formula:
R1 = VOV IDMAX . IDMIN = IDMAX x VSMIN . VSMAX
Substituting:
IDMIN = 250 A x 36V = 125 A . 72V
Now the value of R3 is calculated from IDMIN:
R3 = VSMIN - VUV . IDMIN
VUV is the under-voltage trip point, also 2.5V. Substituting:
R3 = 36V - 2.5V = 268k . 125 A
The closest standard 1% resistor value is 267k Then R2 is calculated:
(R1+ R2) =
or
R2 =
VUV IDMIN ,
VUV - R1. IDMIN
Substituting:
R2 = 2.5V - 10k = 20k - 10k = 10k . 125 A
An Excel spread sheet is available on Summit's website (www.summitmicro.com) to simplify the resistor value calculations and tolerance analysis for R1, R2, and R3. Dropper Resistor Selection The SMH4811A is powered from the high-voltage supply via a dropper resistor, RD. The dropper resistor must provide the SMH4811A (and its loads) with sufficient operating current under minimum supply voltage conditions, but must not allow the maximum supply current to be exceeded under maximum supply voltage conditions. The dropper resistor value is calculated from:
Substituting:
R1 = 2.5V = 10k . 250 A
Next the minimum current that flows through the resistive divider, IDMIN, is calculated from the ratio of minimum and maximum supply voltage levels:
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2044 6.1 2/8/01
RD =
VSMIN - VDDMAX IDD + ILOAD
,
SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
where VSMIN is the lowest operating supply voltage, VDDMAX is the upper limit of the SMH4811A supply voltage, IDD is minimum current required for the SMH4811A to operate, and ILOAD is any additional load current from the 2.5V and 5V outputs and between VDD and VSS. The min/max current limits are easily met using the dropper resistor, except in circumstances where the input voltage may swing over a very wide range (e.g., input varies between 20V and 100V). In these circumstances it may be necessary to add an 11V zener diode between VDD and VSS to handle the wide current range. The zener voltage should be below the nominal regulation voltage of the SMH4811A so that it becomes the primary regulator. MOSFET VDS(ON) Threshold The drain sense input on the SMH4811A monitors the voltage at the drain of the external power MOSFET switch with respect to VSS. When the MOSFET's VDS is below the user-defined threshold the MOSFET switch is considered to be ON. The VDS(ON)THRESHOLD is adjusted using the resistor, RT, in series with the drain sense protection diode. This protection, or blocking, diode prevents high voltage breakdown of the drain sense input when the MOSFET switch is OFF. A low leakage MMBD1401 diode
offers protection up to 100V. For high voltage applications (up to 500V) the Central Semiconductor CMR1F-10M diode should be used. The VDS(ON)THRESHOLD is calculated from:
VDS (ON)THRESHOLD = VSENSE - (ISENSE x RT ) - VDIODE ,
where VDIODE is the forward voltage drop of the protection diode. The VDS(ON)THRESHOLD varies over temperature due to the temperature dependence of VDIODE and ISENSE. The calculation below gives the VDS(ON)THRESHOLD under the worst case condition of 85C ambient. Using a 68k resistor for RT gives:
VDS (ON)THRESHOLD = 2.5V - (15 A x 68k ) - 0.5V = 1V .
The voltage drop across the MOSFET switch and sense resistor, VDSS, is calculated from:
VDSS = ID (RS + RON ) ,
where ID is the MOSFET drain current, RS is the circuit breaker sense resistor, and RON is the MOSFET on resistance.
Note: Figures 5 through 8 -- the *10 resistor must be located as close as possible to the MOSFET
SUMMIT MICROELECTRONICS, Inc.
2044 6.1 2/8/01
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SMH4811A
Preliminary
APPLICATIONS CIRCUITS
0V
10nF 100V RD 6.8k
0V
ENPG
2.5VREF
EN/TS
VDD
R3 UV R2
MMBTA06LT1
PG# OV 10k PD1# PD2#
VGATE DRAIN SENSE
SMH4811A
1N4148
10k
CBSENSE
47k 5VREF
FAULT# R1 100nF 50V
VSS
100nF 1k *10 RS 20m 10nF 100V RT 68k 100nF 50V 100F 100V
MMBD1401
-48V
2044 Fig05
-48V
Figure 5. Changing Polarity of Power Good Output
0V
NTC 50k @TMAX 10nF 100V R3 RD 6.8k 1k 1M EN/TS LMV331 R2 OV 10k PD1# 10k
DRAIN SENSE 2.5VREF ENPG VDD
0V
+ - UV
PG#
MMBTA06LT1
100k
SMH4811A
PD2# FAULT#
CBSENSE
5VREF
R1
100nF 50V
VSS
50k
VGATE
100nF 1k *10 RS 20m 10nF 100V RT 68k
100nF 50V 100nF 50V
100F 100V
MMBD1401
-48V
2044 Fig06
-48V
Figure 6. Overtemperature Shutdown
12
2044 6.1 2/8/01 SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
0V
10k 10nF 100V R3 1k 1M
2.5VREF VDD ENPG
0V
RD 6.8k
+ EN1 - R2 OV LMV 339 + EN3 - 10k PD1# PD2# 10k EN/TS UV + EN2 -
PG#
MMBTA06LT1
SMH4811A
5VREF
DRAIN SENSE
100k
R1 100nF 50V
EN4
-
VSS
+
VGATE
FAULT#
CBSENSE
100nF 1k *10 RS 20m 10nF 100V RT 68k
100nF 50V 100nF 50V
100F 100V
MMBD1401
-48V
2044 Fig07
-48V
Figure 7. Expanding Input Monitoring Capability
0V
R3 RD 6.8k DC / DC Converters +VIN +VOUT -VIN -VOUT ON/OFF
VDD
EN/TS UV R2 OV 10k PD1# 10k
ENPG
PG#
MMBTA06LT1
V 0V
SMH4811A
DRAIN SENSE
5VREF
100k
CBSENSE
PD2#
100nF 50V
VSS
R1
100nF 1k 68k
VGATE
10nF 100V RS
100nF 50V
100F 100V
*10
10nF 100V
MMBD1401
2044 Fig08
-48V
Figure 8. Typical Application with DC/DC Converter
SUMMIT MICROELECTRONICS, Inc. 2044 6.1 2/8/01
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SMH4811A
Preliminary
PACKAGES
SSOP PACKAGE
D
JEDEC MO-137
H
1
E A
hx45
S
C
0 to 8 typ
A2 e
L
B
A1
2044 SSOP
Dimension A A1 A2 B C D E e H h L S
Inches Min. 0.061 0.004 0.055 0.008 0.0075 0.337 0.150 0.230 0.010 0.016 0.0500 Nom. 0.064 0.006 0.058 0.010 0.008 0.342 0.155 0.025BSC 0.236 0.013 0.025 0.0525 0.244 0.016 0.035 0.0550 5.84 0.25 0.41 1.27 Max. 0.068 0.0098 0.061 0.012 0.0098 0.344 0.157 Min. 1.55 0.12 1.4 0.20 0.19 8.56 3.81
Millimeters Nom. 1.63 0.15 1.47 0.25 0.20 8.69 3.94 0.635BSC 5.99 0.33 0.64 1.33 6.20 0.41 0.89 1.40
2044 SSOP DIM Table
Max. 1.73 0.25 1.55 0.31 0.25 8.74 3.99
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2044 6.1 2/8/01
SUMMIT MICROELECTRONICS, Inc.
SMH4811A
Preliminary
16 PIN SOIC PACKAGE
0.390 0.005 16 9 .0085 .0010 (After Plating)
0.236 0.008
0.1550.005
S
Pin 1 Index
1 OIC
6
0.151 0.005
155 0.005
1
8
0 8
0.05 BSC
0.016 0.003
DETAIL A
.016 .002 7 1 7 1 45 1 0.024 0.002
0.054 0.005 0.069 MAX .004 .007 .003 7 1 0.390 0.005 0.007 0.003 0.023 0.005 0.041
Note: 1. Reference: JEDEC publication MS-012 PTX 360-120 2. Unit: Inches 3. Mold flash, protrusion & gate burr shall not exceed 0.006 inch per side.
DETAIL A
2044 SOIC 1.0
ORDERING INFORMATION
SMH4811A Base Part Number
G Package G = SSOP S = SOIC
2044 Tree 5.0
SUMMIT MICROELECTRONICS, Inc.
2044 6.1 2/8/01
15
SMH4811A
Preliminary
NOTICE SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user's specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission. SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances. (c) Copyright 2000 SUMMIT Microelectronics, Inc.
16
2044 6.1 2/8/01
SUMMIT MICROELECTRONICS, Inc.

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